In a CMOS inverter with $V_{DD} = 3.3\,\text{V}$, NMOS parameters $k_n = 2\,\text{mA/V}^2$, $V_{tn} = 0.5\,\text{V}$, and PMOS parameters $k_p = 1\,\text{mA/V}^2$, $|V_{tp}| = 0.5\,\text{V}$, the switching threshold $V_M$ (where $V_{out} = V_{in}$) is approximately:

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Electrical Engineering QUESTION #2193

Question 1

$1.26\,\text{V}$✔️
$1.65\,\text{V}$
$0.99\,\text{V}$
$2.00\,\text{V}$

Correct Answer Explanation

$V_M = \frac{V_{tn}+\sqrt{k_p/k_n}(V_{DD}-|V_{tp}|)}{1+\sqrt{k_p/k_n}} = \frac{0.5+\sqrt{0.5}(2.8)}{1+\sqrt{0.5}} = \frac{0.5+1.980}{1.707} = \frac{2.480}{1.707} \approx 1.26\,\text{V}$. The threshold is below $V_{DD}/2 = 1.65\,\text{V}$ because $k_p < k_n$.

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